Galactic Tech Empire

Chapter 93 Chip Technology
Huang Haojie didn't care about the dying struggles of Shin-Etsu and LG Chem.

Because for Galaxy Technology, the area of ​​silicon wafers has lost its meaning.

If necessary, Neutron Star can produce large-area square wafers at any time, so even if Shin-Etsu and LG Chem have developed 18-inch round wafers, it will not help.

The square chip of Neutron Star Materials Co., Ltd. is ahead of the round chip in an all-round way, which is an unstoppable trend.

Now Huang Haojie is in the Semiconductor Research Institute of Galaxy Technology.

Yinhe Technology recruited more than 100 graduates majoring in semiconductors, plus five engineers or researchers poached from domestic semiconductor companies, and Zhang Rujing brought over a dozen engineers and researchers.

Although there are only more than 100 people in the semiconductor research institute of Yinhe Technology, the sparrow is small but has all internal organs.

Huang Haojie looked at the orderly semiconductor research institute and nodded in satisfaction.

"Li Xiang, how is your research on the mechanism of C31 transporting other chip materials?"

Li Xiang raised his glasses and replied excitedly: "This C31 fullerene can transport most of the raw materials for making chips. Even if the other small parts cannot be transported, we can use raw materials that can be transported to replace them."

"very good."

"Boss, I think your invention can win the Dynamite Award." A Mediterranean researcher was full of admiration.

"What about the dynamite award? I don't need this kind of thing." Huang Haojie didn't really come from a major, so he didn't pay much attention to such things as the dynamite award.

... All the researchers and engineers were speechless and choked up. Others wanted to win the Dynamite Award, but my boss was fine and didn't care at all.

Huang Haojie and a group of engineers are developing a chip manufacturing process that is different from the current chip process.

Generally speaking, chip manufacturing factories buy silicon wafers directly from silicon wafer factories instead of producing them themselves.

The chip manufacturing plant will first inspect the silicon wafers, and then put them on the production line after inspection without damage. There may be various film-forming processes in the early stage, and then enter the link of applying photoresist.

Photolithography is a graphic printing technology and a key process in the integrated circuit manufacturing process.

First, the photoresist (photosensitive resin) is dropped on the silicon wafer, and the photoresist film is evenly applied by high-speed rotation, and the photoresist film is cured at an appropriate temperature.

Photoresist is a material that is very sensitive to light, temperature, and humidity, and its chemical properties can change after exposure to light, which is the basis of the entire process.

Next is UV exposure.

As far as a single technical process is concerned, the photolithography process is the most complicated and costly.

Because the lithography template, lens, and light source jointly determine the size of the transistor "printed" on the photoresist.

Place the silicon wafer coated with photoresist into the exposure device of the step-and-repeat exposure machine to "replicate" the mask pattern.

There is a pre-designed circuit pattern in the mask, and after the ultraviolet light passes through the mask and is refracted by a special lens, the circuit pattern in the mask is formed on the photoresist layer.

一般来说，在硅片上得到的电路图案是掩模上的图案1/10、1/5、1/4，因此步进重复曝光机也称为“缩小投影曝光装置”。

There are two factors that determine the performance of the stepper and repeat exposure machine: one is the wavelength of light, and the other is the numerical aperture of the lens.

If you want to reduce the size of transistors on silicon wafers, you need to look for light with shorter wavelengths (EUV, extreme ultraviolet) that can be used reasonably and lenses with larger numerical apertures (affected by the lens material, there are limits).

Part of the photoresist is dissolved, and the exposed silicon wafer is developed.

Taking the positive photoresist as an example, after spraying a strong alkaline developer, the photoresist irradiated by ultraviolet light will undergo a chemical reaction, and the chemical reaction will occur under the action of the alkali solution, and it will dissolve in the developer, while the photoresist that has not been irradiated will undergo a chemical reaction. The photoresist pattern will be completely preserved.

After the development is completed, the surface of the silicon wafer should be rinsed and sent to an oven for heat treatment to evaporate water and cure the photoresist.

Then enter the etching phase.

Immersing the silicon wafer into a special etching tank containing an etchant can dissolve away the exposed silicon wafer, while the remaining photoresist protects the parts that do not need to be etched.

Ultrasonic vibration is applied during this period to accelerate the removal of impurities attached to the surface of the silicon wafer and prevent etching products from staying on the surface of the silicon wafer to cause uneven etching.

The next step is to remove the photoresist.

The photoresist is ashed by oxygen plasma to remove all photoresist.

At this point, the designed circuit pattern of the first layer can be completed.

Repeat steps 6-8. Since the current transistor has been designed with 3D FinFET, it is impossible to produce the required pattern at one time. It is necessary to repeat steps 6-8 for processing, and there will be various film-forming processes (insulation film, metal film) are involved to obtain the final 3D transistor.

Next comes the ion implantation stage.

In a specific area, the process of consciously introducing specific impurities is called "diffusion of impurities".

In addition to controlling the conductivity type (P junction, N junction) through impurity diffusion, it can also be used to control the concentration and distribution of impurities.

Nowadays, ion implantation is generally used for impurity diffusion. In the ion implanter, the conductive impurities to be doped are introduced into the arc chamber, and ionized by discharge. After being accelerated by the electric field, the ions with energy of tens to thousands of keV The beam is injected from the surface of the silicon wafer.

After the ion implantation, the silicon wafer needs to be heat treated. On the one hand, the principle of thermal diffusion is used to further "press" the impurities into the silicon, and on the other hand, the integrity of the crystal lattice is restored, and the electrical characteristics of the impurities are activated.

The ion implantation method has the advantages of low processing temperature, uniform and large-area implantation of impurities, and easy control, so it has become an indispensable process in VLSI.

Remove the photoresist again.After the ion implantation is completed, the photoresist mask left by the selective doping can be removed.

At this time, a small part of silicon atoms inside the single crystal silicon has been replaced by "impurity" elements, thus generating free electrons or holes.

Insulation layer treatment. At this time, the prototype of the transistor has been basically completed, and a layer of silicon oxide film is deposited on the surface of the silicon wafer by vapor phase deposition to form an insulation layer.

Also use the photolithographic mask technology to open holes on the interlayer insulating film so as to lead out the conductor electrodes.

Precipitate the copper layer, use the sputtering deposition method to deposit the copper layer for wiring on the entire surface of the silicon wafer, and continue to use the photolithography mask technology to engrave the copper layer to form the source, drain, and gate of the field effect transistor.

Finally, an insulating layer is deposited over the entire surface of the silicon wafer to protect the transistors.

Build circuits connecting transistors.

After a long process, billions of transistors have been fabricated.

All that remains is how to connect these transistors together.

Similarly, a layer of copper is formed first, and then fine operations such as photolithography masking and etching openings are performed, and then the next layer of copper is deposited.

This process is repeated many times, depending on the size of the chip's transistors and the degree of replication.

The end result is an extremely complex network of multilayer connected circuits.

Since the current IC contains various refined components and huge interconnected circuits, the structure is very complex, the actual number of circuit layers has reached 30 layers, and there are more and more uneven surfaces, with great differences in height, so the CMP chemical machinery was developed. Polishing technique.

CMP grinding is performed every time a layer of circuit is completed.

In addition, in order to successfully complete the multi-layer Cu three-dimensional wiring, a new wiring method of the Damascus method was developed. After the barrier metal layer was plated, the Cu film was sputtered as a whole, and then the Cu and the barrier metal layer outside the wiring were removed by CMP to form Wiring required.

The chip circuit has been basically completed so far, and it has gone through hundreds of different processes, all of which are based on fine-grained operations. Any mistake in any place will lead to the scrapping of the entire silicon wafer. Countless One billion transistors are the crystallization of all the wisdom of human beings since civilization.

To make it so complicated, there are hundreds of processes, but to carve lines on the silicon wafer, inject conductive impurities, and form a switch.

(End of this chapter)